IEEE 802.3ch-2020 pdf download

IEEE 802.3ch-2020 pdf download.IEEE Standard for Ethernet Amendment 8:Physical Layer Specifications and Management Parameters for 2.5 Gb/s,5 Gb/s, and 10 Gb/s Automotive Electrical Ethernet.
45.2.1.192.1 PMA/PMD reset (1 .2309.15)
Resetting the MuIt1GBASE-T1 PMA/PMD is accomplished by setting bit 1.2309.15 to a one. This action shall set all PMA/PMD registers to their default states. As a consequence, this action may change the internal state of a MuIt1GBASE-Tl PMA/PMD and the state of the physical link. This action may also initiate a reset in any other MMDs that are instantiated in the same package. Bit I .2309.15 is self-clearing, and the Mu1tiGBASE-Tl PMAJPMD shall return a value of one in bit 1.2309.15 when a reset is in progress; otherwise, it shall return a value of zero. The MuItiGBASE-Tl PMA/PMD is not required to accept a write transaction to any of its registers until the reset process is completed. The control and management intertce shall be restored to operation as defined in 149.4.2.1, starting when bit 1.2309.15 is set.
During a reset, the Mu1t1GBASE-T I PMA!PMD shall respond to reads from register bits 1.2309.15,
1.8.15:14, and 1.0. 15. All other register bits shall be ignored.
NOTE—This operation may interrupt data communication.
Bit 1.2309.15 is a copy of bit 1 .0. 15 and setting or clearing either bit shall set or clear the other bit. Setting
either bit shall reset the MuIt1GBASE-T1 PMA/PMD.
45.2.1.192.2 Transmit disable (1 .2309.14)
When bit 1.2309.14 is set to a one, the PMA shall disable output on the transmit path. When bit 1.2309.14 is set to a zero, the PMA shall enable output on the transmit path.
Bit 1.2309.14 is a copy of bit 1.9.0 and setting or clearing either bit shall set or clear the other bit. Setting either bit shall disable the transmitter.
45.2.1.192.3 Low power (1.2309.11)
When the low-power ability is supported, the MuItiGBASE-Tl PMA/PMD may be placed into a low-power mode by setting bit 1.2309.11 to one. This action may also initiate a low-power mode in any other MMDs that are instantiated in the same package. The low-power mode is exited by resetting the MuItIGBASE-Tl PMA/PMD. The behavior of the Mu1tiGBASE-Tl PMA/PMD in transition to and from the low-power mode is implementation specific and any interface signals should not be relied upon. While in the low-power mode, the device shall, at a minimum, respond to management transactions necessary to exit the low-powermode.
The default value of bit 1.2309.11 is zero.
This operation interrupts data communication.
Bit 1.2309.11 is a copy of bit 1.0.11 and setting or clearing either bit shall set or clear the other bit. Settingeither bit shall put the MultiGBASE-T1 PMA/PMD in low-power mode.
45.2.1.193 MultiGBASE-T1 PMA status register (1.2310)
The assignment of bits in the MultiGBASE-T1 PMA status register is shown in Table 45-155b.
45.2.1.193.1 MuItiGBASE-T1 OAM ability (1 .2310.11)
When read as a one, bit 1.2310.1 1 indicates that the MuIt1GBASE-T1 PHY supports MuItiGBASE-T1 OAM
(see 149.3.9). When read as a zero, bit 1.2310.11 indicates that the MuItiGBASE-T1 PHY does not support
Mu1t1GBASE-TI OAM.
45.2.1.193.2 EEE ability (1 .2310.1 0)
When read as a one, bit 1.23 10.10 indicates that the Mu1tiGBASE-T1 PHY supports EEE. When read as a
zero, bit 1.2310.10 indicates that the MuItiGBASE-T1 PHY does not support EEE.
45.2.1.193.3 Receive fault ability (1 .2310.9)
When read as a one, bit 1.23 10.9 indicates that the MuIt1GBASE-T1 PMA/PMD has the ability to detect a fault condition on the receive path. When read as a zero, bit 1.2310.9 indicates that the MuItiGBASE-T1 PMA!PMD does not have the ability to detect a fault condition on the receive path.
45.2.1.193.4 Low-power ability (1 .231 0.8)
When read as a one, bit 1.2310.8 indicates that the Mu1t1GBASE-Tl PMA/PMD supports the low-power feature. When read as a zero, bit 1.2310.8 indicates that the MuIt1GBASE-T1 PMA/PMD does not support the low-power feature. If the MuItiGBASE-T 1 PMA/PMD supports the low-power feature, then it is controlled using either bit 1.2309.1 1 or bit 1.0. 11.
45.2.1.193.5 PrecodeSel (1 .231 0.4:3)
Bits 1.2310.4:3 contain the requested precoder setting communicated by the PHY to the link partner via the
PrecodeSel bits in the Infofield (see 149.4.2.4.5).
45.2.1.193.6 Receive polarity (1 .2310.2)
When read as zero, bit 1 .23 10.2 indicates that the polarity of the receiver is not reversed. When read as one, bit 1 .23 10.2 indicates that the polarity of’ the receiver is reversed.